Field of the Invention
The present invention relates to reference clock signals, and, more specifically but not exclusively, to the generation of sampling clock signals for data converters.
Description of the Related Art
In a conventional wireless communication system comprising a digital radio receiver, the performance of the digital radio receiver is critical to the overall performance of the system. Further, the performance of the digital radio receiver depends, in part, on the operation of the receiver components such as the analog-to-digital converter (ADC). In general, the output of an ADC can be considered to be (i) the multiplication of all signals at the analog input of the ADC and all signals at the sampling clock input of the ADC in the time domain or (ii) the convolution of these signals in the frequency domain. Thus, the digital output of the ADC may be a combination of different products of (i) the analog input signal, which includes noise from the signal path and (ii) the sampling clock signal, which includes noise from the clock path. Noise in the clock path can typically degrade performance of the ADC, and consequently, the performance of the digital radio receiver.